86 lines
No EOL
4 KiB
Text
86 lines
No EOL
4 KiB
Text
# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2009 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II
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# Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
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# Date created = 13:44:11 December 08, 2017
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# Chronometre_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY FLEX10K
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set_global_assignment -name DEVICE "EPF10K70RC240-4"
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set_global_assignment -name TOP_LEVEL_ENTITY CHRONO
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION "9.0 SP2"
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:44:11 DECEMBER 08, 2017"
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set_global_assignment -name LAST_QUARTUS_VERSION "9.0 SP2"
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set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_blast_fpga
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name BDF_FILE Decodeur.bdf
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set_global_assignment -name SMART_RECOMPILE ON
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set_global_assignment -name FLEX10K_DEVICE_IO_STANDARD TTL
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set_global_assignment -name MISC_FILE "U:/SLEA/Chronometre.dpf"
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set_global_assignment -name VECTOR_WAVEFORM_FILE decodeur1.vwf
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set_global_assignment -name SIMULATION_MODE FUNCTIONAL
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set_global_assignment -name BDF_FILE BoutonPoussoir.bdf
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set_global_assignment -name VECTOR_WAVEFORM_FILE BoutonPoussoir.vwf
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set_global_assignment -name BDF_FILE BoutonPoussoir2.bdf
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set_global_assignment -name VECTOR_WAVEFORM_FILE BoutonPoussoir2.vwf
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set_global_assignment -name BDF_FILE DiviseurDeFrequence.bdf
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set_global_assignment -name BDF_FILE CheminDeDonnees.bdf
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set_location_assignment PIN_6 -to A
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set_location_assignment PIN_7 -to B
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set_location_assignment PIN_8 -to C
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set_location_assignment PIN_9 -to D
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set_location_assignment PIN_11 -to E
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set_location_assignment PIN_12 -to F
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set_location_assignment PIN_13 -to G
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set_location_assignment PIN_25 -to pointSeconde
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set_location_assignment PIN_14 -to pointDixieme
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set_location_assignment PIN_17 -to a1
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set_location_assignment PIN_18 -to b1
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set_location_assignment PIN_19 -to c1
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set_location_assignment PIN_20 -to d1
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set_location_assignment PIN_21 -to e1
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set_location_assignment PIN_23 -to f1
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set_location_assignment PIN_24 -to g1
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set_global_assignment -name BDF_FILE Sequenceur.bdf
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set_global_assignment -name BDF_FILE CHRONO.bdf
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set_location_assignment PIN_91 -to H
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set_location_assignment PIN_28 -to BP1
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set_location_assignment PIN_29 -to BP2
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set_location_assignment PIN_48 -to Count
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set_location_assignment PIN_53 -to Reset
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set_location_assignment PIN_45 -to BP1out
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set_global_assignment -name BDF_FILE sequenceur2.bdf
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set_global_assignment -name VECTOR_WAVEFORM_FILE sequenceur2.vwf
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set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE sequenceur2.vwf |