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Séance du 24/01
2018-01-24 16:28:00 +00:00
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
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(connector
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(connector
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(connector
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)
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(text "cnt" (rect 248 480 263 492)(font "Arial" ))
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(junction (pt 336 464))
(junction (pt 488 464))
(junction (pt 688 464))
(junction (pt 992 216))
(junction (pt 320 384))
(junction (pt 320 400))
(junction (pt 496 400))
(junction (pt 496 384))
(junction (pt 728 408))
(junction (pt 728 392))
(junction (pt 696 224))
Reference in a new issue Copy permalink